2009年度

  • 論文誌

    一ノ宮佳裕,石田智之,田上士郎,尼崎太樹,久我守弘,末吉敏則
    ``SRAM型FPGAの部分再構成によるソフトコアプロセッサの高信頼化,''
    信学論,vol.J92-D,no.12,pp.2105-2113,Dec. 2009.

    江藤淳哉,尼崎太樹,飯田全広,末吉敏則
    ``配線性とアクティビティを利用する省電力指向クラスタリング手法,''
    信学論レター,vol.J92-D,no.12,pp.2181-2184,Dec. 2009.

    中野光臣,弘田澄男,兒玉章宏,飯田全広,末吉敏則
    ``超並列プロセッサコアにおけるPE間データ転送効率の改善,''
    情報処理学会論文誌,数理モデル化と応用,vol.2,no.3,pp.64-74,Dec. 2009.

    Michihiro Takeuchi, Shoogo Ueno, Tsuyoshi Usagawa, Toshinori Sueyoshi, Masaki Sekino and Norio Iriguchi
    ``Measurement of T2 Relaxation Time and Fiber Orientation Degree of Collagen Gel Exposed to a Magnetic Field,''
    International Information Institute, Vol.13, No.1, pp.229-234, Jan. 2010.

    Yuzo Nishioka, Masahiro Iida and Toshinori Sueyoshi
    ``Small-World Network to Reduce Delay in FPGA Routing Structures,''
    International Journal of Innovative Computing, Information and Control (IJICIC), Vol.6, No.2, pp.551-566, Feb. 2010.

  • 国際会議

    Katsuya Maruyama, Nobuo Mizuuchi, Takashi Moroi, Itsuo Isobe, Toshinori Sueyoshi,Tsuyoshi Usagawa, Norio Iriguchi,
    ``MR Angiography of the Abdomen Artery by IR-prepared, Segmented TrueFISP at 3T without Contrast Agent,''
    Proc. IEEE-CME, pp.195-198, Arizona, Apr. 2009

    Nobuo Mizuuchi, Katsuya Maruyama, Takashi Moroi, Shohei Takemoto, Toshinori Sueyoshi,Tsuyoshi Usagawa, Norio Iriguchi,
    ``Depiction of the Spinal Cord by Diffusion Weighted Imaging,''
    Proc. IEEE-CME, pp.203-207, Arizona, Apr. 2009

    Shohei Takemoto, Masahiro Migita, Nobuo Mizuuchi, Katsuya Maruyama, Takashi Moroi, Toshinori Sueyoshi, Masaki Sekino, and Norio Iriguchi,
    ``Multidirectional RF Coils for MRI,''
    Proc. IEEE-CME, pp.208-211, Arizona ,Apr. 2009

    Takashi Moroi, Nobuo Mizuuchi, Katsuya Maruyama, Shohei Takemoto, Toshinori Sueyoshi, Tsuyoshi Usagawa, Norio Iriguchi,
    ``Motion Artifact Reduction by Randomized Phase Encoding (RPE) TSE,''
    Proc. IEEE-CME, pp.212-215, Arizona, Apr. 2009

    M.Nakano, M.Iida and T.Sueyoshi,
    ``Improvement of execution efficiency in massively parallel SIMD accelerator,''
    Proc. 24th International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2009), pp.1196-1197, Jeju, Korea, Jul. 2009.(2009/7/7発表)

    S.Tanoue, T.Ishida, Y.Ichinomiya, M.Amagasaki, M.Kuga and T.Sueyoshi,
    ``A Novel States Recovery Technique for the TMR Softcore Processor,''
    Proc. 19th International Conference on Field Programmable Logic and Applications (FPL2009), pp.543-546, Prague, Czech Republic, Aug. 2009.(2009/9/1発表)

    Y.Okamoto, K.Inoue, M.Amagasaki, M.Iida and T.Sueyoshi
    ``A novel clustering algorithm for Variable Grain Logic Cell,''
    Proc. 2009 Joint Conference of Electrical and Electronics Engineers in Kyusyu, 12-1P-04 , Iizuka, Japan, Sep. 2009. (2009/9/28発表)

    Y.Ichinomiya, S.Tanoue, M.Amagasaki, M.Kuga and T.Sueyoshi
    ``SEU Recovery Technique for TMR Softcore Processor on SRAM-based FPGA,''
    Proc. 2009 Joint Conference of Electrical and Electronics Engineers in Kyusyu, 12-1P-05 , Iizuka, Japan, Sep. 2009. (2009/9/28発表)

    K.Kato, M.Shintani, M.Amagasaki, M.Iida and T.Sueyoshi
    ``An analysis of logic function usage on FPGA technology mapping,''
    Proc. 2009 Joint Conference of Electrical and Electronics Engineers in Kyusyu, 12-1P-06 , Iizuka, Japan, Sep. 2009. (2009/9/28発表)

    M.Koga, K.Inoue, Y.Okamoto, M.Amagasaki, M.Iida and T.Sueyoshi
    ``The effect of input granularity on Variable Grain Logic Cell performance,''
    Proc. 2009 Joint Conference of Electrical and Electronics Engineers in Kyusyu, 12-1P-07 , Iizuka, Japan, Sep. 2009. (2009/9/28発表)

    Shunsuke Oshima, Arata Hirakawa, Takuo Nakashima and Toshinori Sueyoshi
    "DoS/DDoS Detection Scheme using Statistical Method based on the Destination Port Number",
    The Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIHMSP2009), Kyoto, Japan, Sep. 2009

    Shunsuke Oshima, Takuo Nakashima and Toshinori Sueyoshi
    "A Statistical DoS/DDoS Detection Method using the Window of the Constant Packet Number",
    The 2nd International Conference on Computer Science and its Applications (CSA2009), pp.685-690, Jeju, Korea, Dec. 2009

    Mitsutaka.Nakano, Masahiro.Iida and Toshinori.Sueyoshi
    ``Improvement of Execution Efficiency on the MX Core,''
    Proc. 2009 International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT), Workshop on Ultr Performance and Dependable Acceleration Systems (UPDAS), pp.420-425, Hiroshima, Japan, Dec. 2009.(2009/12/11発表)

    N.Kai, Y.Tsutsumi, M.Amagasaki, M.Kuga and T.Sueyoshi
    ``A Case Study of Error Correction method for SRAM-based FPGA using the Partial Reconfiguration,''
    The 3rd International Student Conference on Advanced Science and Technology(ICAST), pp213-214 , Ewha Womans University, Seoul, Korea, Dec. 2009. (2009/12/11発表)

    Shoichi Nishida, Yuzo Nishioka, Motoki Amagasaki, Masahiro Iida, and Toshinori Sueyoshi
    ``A low power FPGA routing structure based on the small-world network,''
    The 3rd International Student Conference on Advanced Science and Technology(ICAST), pp.215-216, Ewha Womans University, Seoul, Korea, December 11-12, Dec. 2009(2009/12/11発表)

    Kota Kato, Masaki Shintani, Motoki Amagasaki, Masahiro Iida, and Toshinori Sueyoshi
    ``An Analysis of LUT Redundancy on FPGA Technology Mapping,''
    The 3nd International Student Conference on Advanced Science and Technology(ICAST), pp.217-218, Ewha Womans University, Seoul, Korea, December 11-12, Dec. 2009(2009/12/11発表)

    Shunsuke Oshima, Takuo Nakashima and Toshinori Sueyoshi
    "Early DoS/DDoS Detection Method using Short-term Statistics",
    2010 International Conference on Complex, Intelligent and Software Intensive Systems (CISIS2010), pp.168-173, Krakow, Poland ,Mar. 2010

  • 一般講演発表

    西田翔一,西岡勇蔵,尼崎太樹,飯田全広,末吉敏則
    ``スモールワールドネットワーク化配線構造によるFPGAの消費電力削減,''
    信学技報 RECONF2009-4,vol.109,no.26,pp.19-24,May 2009. (2009/5/14発表)

    一ノ宮佳裕,田上士郎,藪田敏生,尼崎太樹,久我守弘,末吉敏則
    ``三重冗長ソフトコアプロセッサにおける同期復旧処理の一検討,''
    信学技報 RECONF2009-9,vol.109,no.26,pp.49-54,May 2009. (2009/5/15発表)

    江藤淳哉,尼崎太樹,飯田全広,末吉敏則
    ``配線性とアクティビティを利用するFPGAの低消費電力化クラスタリング手法,''
    信学技報 RECONF2009-10,vol.109,no.26,pp.55-60,May 2009. (2009/5/15発表)

    甲斐統貴,堤喜章,尼崎太樹,久我守弘,末吉敏則,
    ``SRAM型FPGAの部分再構成によるエラー訂正処理の検討,''
    情報処理学会九州支部若手の会,pp.33-38,Sep. 2009. (2009/9/7発表)

    田上士郎,一ノ宮佳裕,尼崎太樹,久我守弘,末吉敏則,
    ``SRAM型FPGAを用いた三重冗長ソフトコアプロセッサにおけるSEU復旧技術,''
    情報処理学会九州支部若手の会,pp.39-46,Sep. 2009. (2009/9/7発表)

    兒玉章宏,中野光臣,飯田全広,末吉敏則,
    ``MXコアにおけるデータ配置を考慮した転送処理の効率化,''
    情報処理学会九州支部若手の会,pp.49-54,Sep. 2009. (2009/9/8発表)

    今泉真哉,飯田全広,末吉敏則,
    ``配線性を利用する低消費電力指向のクラスタリング及び配置手法,''
    信学技報, vol. 109, no. 198, RECONF2009-23, pp. 25-30,Sep. 2009. (2009/9/17発表)

    新谷政樹,加藤宏太,尼崎太樹,飯田全広,末吉敏則,
    ``実装効率改善へ向けたP同値類に基づくLUTの論理出現率に関する調査,''
    信学技報, vol. 109, no. 198, RECONF2009-24, pp. 31-36,Sep. 2009. (2009/9/17発表)

    田上士郎,尼崎太樹,久我守弘,末吉敏則,
    ``FPGAを用いた機能分散型デュアルプロセッサシステムに関する一検討,''
    信学技報 CPSY2009-32,vol.109,no.237,pp.27-32,Oct 2009. (2009/10/20発表)

    小島俊輔, 中嶋卓雄, 末吉敏則
    ``統計的手法を用いたDoS/DDoS検出手法とその特性,''
    情報処理学会マルチメディア通信と分散処理ワークショップ論文集(DPSWS2009), pp.209-214, Oct. 2009

    甲斐統貴,堤喜章,尼崎太樹,久我守弘,末吉敏則,
    ``SRAM型FPGAの部分再構成によるエラー訂正手法の一検討,''
    信学技報, vol. 109, no. 320, RECONF2009-41, pp. 1-6,Dec. 2009.(2009/12/3発表)

    井上万輝,岡本康裕,趙 謙,吉澤孔明,用正博紀,古賀正紘,尼崎太樹,飯田全広,久我守弘,末吉敏則,
    ``粒度可変論理セルをもつ再構成論理デバイスの設計と試作,''
    信学技報, vol. 109, no. 395, RECONF2009-64, pp. 59-64,Jan. 2010.(2010/1/26発表)

    一ノ宮佳裕,田上士郎,尼崎太樹,久我守弘,末吉敏則,
    ``部分再構成によるソフトコアプロセッサの故障回復手法,''
    信学技報, vol. 109, no. 395, RECONF2009-79, pp. 155-160,Jan. 2010.(2010/1/27発表)

    久木田透,久我守弘,末吉敏則,
    ``FPGAにおける高速シリアル通信を用いたASICエミュレータの一検討 ,''
    火の国情報シンポジウム2010論文集,B-1-1,Mar. 2010 (2010/3/15発表)

    富着忠彦,佐藤佳徳,尼崎太樹,飯田全広,末吉敏則,
    ``粒度可変論理セル向け消費電力測定環境の構築 ,''
    火の国情報シンポジウム2010論文集,B-1-4,Mar. 2010 (2010/3/15発表)

    白石恭平,尼崎太樹,久我守弘,藤山修久,犬飼道彦,末吉敏則,
    ``SRAM型FPGAにおける二重冗長回路実装手法の一検討,''
    信学技報, vol. 109, no. 474, CPSY2009-90, pp. 471-476,Mar. 2010.(2010/3/28発表)

  • ポスター

    西田翔一,江藤淳哉,西岡勇蔵,尼崎太樹,飯田全広,末吉敏則,
    ``省電力FPGA配線アーキテクチャとその設計環境の提案,''
    LSIとシステムのワークショップ2009予稿集,pp.292-294,May. 2009.(2009/5/19発表)

    甲斐統貴,堤喜章,尼崎太樹,久我守弘,末吉敏則,
    ``SRAM型FPGAの部分再構成によるエラー訂正手法の一検討,''
    信学技報, vol. 109, no. 320, RECONF2009-41, pp. 1-6,Dec. 2009.(2009/12/3発表)