2016年度

  • 論文誌

    S. Nishimura, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi,
    ``Theorem-proving Verification for Asynchronous Circuits,''
    International Journal of Innovative Computing, Information and Control, Vol.12，No.3, pp.761-777, June 2016

    M.Amagasaki, R.Araki, M.Iida and T.Sueyoshi,
    `` SLM: A Scalable Logic Module Architecture with Less Configuration Memory",
    IEICE Transactions Fundamentals of Electronics, Communications and Computer Sciences, Vol.E99-A, No.12, pp.2500-2506, Dec. 2016

  • 国際会議

    M.Amagasaki, Y.Nakamura, T. Teraoka, M.Iida and T.Sueyoshi,
    ``An Area Compact Soft Error Resident circuit for FPGA,''
    Proc. of the 2016 IEEE Joint Conference on Integrated Circuit Design and Technology (ICICDT), B-3, June 2016, Ho Chi Minh, Vietnam (2016/6/28発表)

    Q.Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi,
    `` A Study of Heteroneneous Computing Design Method based on Virtualization Technology,''
    Proc. of International Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies(HEART2016), pp.105-110, July 2013, Hong Kong, China(2016/7/27発表)

    M.Amagasaki, Y.Nakamura, M.Iida, M.Kuga and T.Sueyoshi,
    ``A Novel Soft Error Tolerant FPGA Architecture,''
    Proc. of IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 4a-3, Sep. 2016, Tallinn, Estonia(2016/9/28発表)

    T.Teraoka, Y.Nakamura, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi,
    ``Development of Soft Error Simulator Based on Layout Information,''
    Proc. of 2016 Joint Conference of Electrical, Electronics and Information Engineers in Kyusyu, 11-1P-04, pp.203-204, Sep. 2016, Miyazaki, Japan (2016/9/29発表)

    S.Nishimura, M.Amagasaki and T.Sueyoshi,
    ``Theorem-proving Verification of Multi-clock Synchronous Circuits on Multimodal Logic,''
    Proc. the 20th Workshop on Synthesis And System Integration of Mixed Information technologies(SASIMI), R3-9, Oct. 2016, Kyoto, Japan (2016/10/25発表)

    Q.Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi,
    ``hCODE: An Open-source Platform for FPGA Accelerators,''
    Proc. International Conference on Field-Programmable Technology(ICFPT), P1-11, Oct. 2016, Xi'an, China (2016/12/7発表)

    Takayuki Matsuzaki, Teruaki Kitasuka and Masahiro Iida
    ``Making smallest-diameter graphs at “Graph Golf”,''
    Proc. Widest Improvement Award Presentation (Invited) on Graph Golf Competition Workshop of CANDAR2016, Hiroshima, Japan. (2016/11/22発表)

    Hakuya Teraoka, Yuji Nakamura, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga and ToshinoriSueyoshi
    ``Soft Error Simulator for Analyzing MBU Pattern,''
    Proc. the 11th International Student Conference on Advanced Science and Technology(ICAST), 9-1, Dec 2016, Kumamoto, Japan.(2016/12/8発表)

    Shunji Nishimura, Motoki Amagasaki and ToshinoriSueyoshi
    ``Broad-sense Synchronous Circuits on Partially Ordered Time,''
    Proc. the 11th International Student Conference on Advanced Science and Technology(ICAST), 9-14, Dec 2016, Kumamoto, Japan.(2016/12/8発表)

    Hendarmawan, Mpho Gift Doctor Gololo, Qian Zhao and Masahiro Iida
    ``High Level Stream Processing with FPGA,''
    Proc. the 11th International Student Conference on Advanced Science and Technology(ICAST), 9-16, Dec 2016, Kumamoto, Japan.(2016/12/8発表)

    Hendarmawan, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga and Toshinori Sueyoshi
    ``A Study of HW/SW Co-design Framework based on the Virtualization Technology,''
    on Asia Pasific Advanced Network Conference (APAN 42), July-August 2016, Hong Kong University, Hong Kong.(2016/7/31発表)

  • 一般講演発表

    中村祐司，寺岡拓也, 尼崎太樹，飯田全広，久我守弘，末吉敏則
    ``FPGA向けMBU訂正回路の提案，''
    信学技報 VLD2016-3，vol.116，no.21，pp35-40，May. 2016.(2016/5/11発表)

    中道拓也，趙　謙，尼崎太樹，飯田全広，久我守弘，末吉敏則
    ``hCODE：FPGAアクセラレータのためのオープンソースプラットフォーム，''
    信学技報 RECONF2016-34，vol.116，no.210，pp45-50，Sep. 2016.(2016/9/6発表)

    西村俊二, 尼崎太樹，末吉敏則
    `` 同期回路の機能的定義による同期概念の形式化，''
    信学技報 MSS2016-53，vol.116，no.316，pp99-104，Nov. 2016.(2016/11/25発表)

    池邊雅登，趙　謙, 尼崎太樹，飯田全広，久我守弘，末吉敏則
    ``3次元FPGA向け消費電力解析ツール，''
    信学技報 RECONF2016-46，vol.116，no.332，pp35-40，Nov. 2016.(2016/11/29発表)

    村瀬　大，高木大智, 尼崎太樹，久我守弘，飯田全広，末吉敏則
    ``高速シリアル光インターコネクトを用いたFPGA分割実装，''
    信学技報 RECONF2016-56，vol.116，no.417，pp31-36，Jan. 2017.(2017/1/23発表)

    福田　寛介，尼崎太樹，飯田全広，久我守弘，末吉敏則
    ``並列デザインパターンを用いた関数型言語による高位合成，''
    情報処理学会九州支部火の国シンポジウム2017，A4-4，March 2017.(2017/3/1発表)

    園田　勇介，趙　謙，久我守弘，尼崎太樹，飯田全広，末吉敏則
    ``組込みデバイス向けリアルタイム時系列データ分析器の設計と実装，''
    情報処理学会九州支部火の国シンポジウム2017，A6-2，March 2017.(2017/3/2発表)

    藤岡　博展，趙　謙，久我守弘，尼崎太樹，飯田全広，末吉敏則
    ``隠れマルコフモデルによる時系列データ分類器のアクセラレータ自動生成，''
    情報処理学会九州支部火の国シンポジウム2017，A6-3，March 2017.(2017/3/2発表)

  • ポスター

    Khin Sandar Lin, Morihiro KUGA and Toshinori SUEYOSHI,
    ``A case study of e-learning material for digital circuit design using HDL,''
    第24回 電子情報通信学会九州支部学生会講演会(国際ポスターセッション), IS-2, Sep. 2016.(2016/9/28発表)