Operations | Control code |
---|---|
Addition (ADD) | 0 0 0 |
Subtract (SUB) | 0 0 1 |
Logical OR (OR) | 0 1 0 |
Logical AND (AND) | 0 1 1 |
Logical NOT (NOT) | 1 0 0 |
Arithmetic shift right (ASR) | 1 0 1 |
Arithmetic shift left (ASL) | 1 1 0 |
Nibble swap (SWP) | 1 1 1 |
Define label of the operation code by "`define".
By this define, the operation code is described with the defined label as distinct from bit pattern.
These defines are described in "aluop.v" file.
`define IADD 3'b000 `define ISUB 3'b001 ... ..."alu.v" file includes "alu_op.v" file to be able to refer.
`timescale 1ns/1ps `include "alu_op.v" module alu ( ... ); ... endmodule
Next, Describe operations .