There are 4 types of flag, sign S, zero Z, overflow V and carry C.
These flags are corded as 4-bit bus F.
The bit order of F is S, Z, V, C from most significant bit.
The changes of flags are individually differ in each operation.
Arithmetic operations
Operation | S | Z | V | C |
---|---|---|---|---|
Addition (ADD) | '1' when result is minus. | '1' when result is zero. | '1' when result is incorrect in signed addition. | '1' when carry occurs in unsigned addition. |
Subtract (SUB) | '1' when result is minus. | '1' when result is zero. | '1' when result is incorrect in signed subtraction. | '1' when borrow occurs in unsigned subtraction. |
Logical operations
Operations | S | Z | V | C |
---|---|---|---|---|
Logical OR (OR) | same as most significant bit | '1' when result is zero | always '0' | always '0' |
Logical NAD (AND) | same as most significant bit | '1' when result is zero | always '0' | always '0' |
Logical NOT (NOT) | same as most significant bit | '1' when result is zero | always '0' | always '0' |
Shift and exchange operations
Operation | S | Z | V | C |
---|---|---|---|---|
Arithmetic shift right (ASR) | '1' when result is minus. | '1' when result is zero | always '0' | same as least significant bit |
Arithmetic shift left (ASL) | '1' when result is minus. | '1' when result is zero | '1' when bit 7 and bit 6 of operand are different value | same as bit 6 od operand |
Nibble swap (SWP) | same as most significant bit | '1' when result is zero | always '0' | always '0' |
Each flag is generated as follows;
reg V; // for overflow always @( ... or ... or ... or ... ) // overflow calculation case ( CB ) `IADD : V <= ( ... ) ? 1 : 0; `ISUB : V <= ( ... ) ? 1 : 0; `ASL : V <= ( ... ) ? 1 : 0; default : V <= 0; endcase assign F[3] = ...... ; // Sign flag assign F[2] = ...... ; // Zero flag assign F[1] = V ; // Overflow flag assign F[0] = ...... ; // Carry flag
Next, Functional simulation for verification.