Implementation for 8-bit ALU

Implementation process for NEXYS4 board

We have to implement the design to an FPGA so that the designed ALU will behave on an FPGA.
We use a circuit board, NEXYS4 by Digilent.

For implementation, we have to write a user constraint file "alu.ucf".
Some constraints are described in ucf file.

"LOC=" indicates to assign the input or output variable to physical FPGA pin.
"IOSTANDARD=VLCMOS33" indicates to set the FPGA pin to Low Voltage CMOS 3.3V.

## Switches
NET "B<0>"  LOC = "U9"	| IOSTANDARD = "LVCMOS33";
NET "B<1>"  LOC = "U8"  | IOSTANDARD = "LVCMOS33";
NET "B<2>"  LOC = "R7"	| IOSTANDARD = "LVCMOS33";
NET "B<3>"  LOC = "R6"  | IOSTANDARD = "LVCMOS33";
NET "B<4>"  LOC = "R5"	| IOSTANDARD = "LVCMOS33";
NET "B<5>"  LOC = "V7"  | IOSTANDARD = "LVCMOS33";
NET "B<6>"  LOC = "V6"	| IOSTANDARD = "LVCMOS33";
NET "B<7>"  LOC = "V5"	| IOSTANDARD = "LVCMOS33";
NET "A<0>"  LOC = "U4"  | IOSTANDARD = "LVCMOS33";
NET "A<1>"  LOC = "V2"	| IOSTANDARD = "LVCMOS33";
NET "A<2>"  LOC = "U2"	| IOSTANDARD = "LVCMOS33";
NET "A<3>"  LOC = "T3"	| IOSTANDARD = "LVCMOS33";
NET "A<4>"  LOC = "T1"  | IOSTANDARD = "LVCMOS33";
NET "A<5>"  LOC = "R3"	| IOSTANDARD = "LVCMOS33";
NET "A<6>"  LOC = "P3"	| IOSTANDARD = "LVCMOS33";
NET "A<7>"  LOC = "P4"	| IOSTANDARD = "LVCMOS33";

## LEDs
NET "Y<0>"  LOC = "T8"	| IOSTANDARD = "LVCMOS33";
NET "Y<1>"  LOC = "V9"  | IOSTANDARD = "LVCMOS33";
NET "Y<2>"  LOC = "R8"	| IOSTANDARD = "LVCMOS33";
NET "Y<3>"  LOC = "T6"  | IOSTANDARD = "LVCMOS33";
NET "Y<4>"  LOC = "T5"	| IOSTANDARD = "LVCMOS33";
NET "Y<5>"  LOC = "T4"  | IOSTANDARD = "LVCMOS33";
NET "Y<6>"  LOC = "U7"	| IOSTANDARD = "LVCMOS33";
NET "Y<7>"  LOC = "U6"	| IOSTANDARD = "LVCMOS33";
NET "F<0>"  LOC = "P5"  | IOSTANDARD = "LVCMOS33";
NET "F<1>"  LOC = "U1"	| IOSTANDARD = "LVCMOS33";
NET "F<2>"  LOC = "R2"	| IOSTANDARD = "LVCMOS33";
NET "F<3>"  LOC = "P2"	| IOSTANDARD = "LVCMOS33";

## Buttons
NET "CB<0>" LOC = "R10"	| IOSTANDARD = "LVCMOS33"; # Right
NET "CB<1>" LOC = "E16" | IOSTANDARD = "LVCMOS33"; # Center
NET "CB<2>" LOC = "T16"	| IOSTANDARD = "LVCMOS33"; # Left

Next, logic systhesis and layout on FPGA .

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