Create a skelton IP for a video module

1. Crate and Import Peripheral Wizard : The first page doesn't have any typing in entries. It presses Next.
2. Peripheral Flow: There is not an entry that the 2nd sheet pages, too, type in. It presses Next.
3. Repository or Project: It confirms that it becomes "To an XPS project" to subscribe a new peripheral (the peripheral circuit) to the present project and it presses Next.
   A new peripheral is preserved at the "~/life/pcores" directory by this.
   It presses Next.
4. Name and Version : It sets the identifier, the version of the new peripheral and so on.
   • Name: vga
   • Major revision: 1
   • Minor revision: 00
   • Hardware/Software compatibility revision: a
   • Description: Video Controller for Character Display
   if finished, click "Next".
5. Bus Interface : It specifies how to connect a new peripheral with the processor. Here, it is "AXI4-lite : It confirms that it becomes Simpler, non-burst control register style interface" and it presses Next.
6. IPIF (IP Interface) It specifies Services Because it makes it be possible to be seen as register (the register : the circuit which stores a data), the video module presses Next from the processor, choosing only "User logic software register" like the following figure.
   
   
   
   
7. It specifies the option which User S/W Register is concerned with.
   " There is Number of software accessible registers" beforehand as 1. It presses Next.
8. IP Interconnect It does an establishment about (IPIC).
   In the video module, because it uses an address, it puts a check in "Bus2IP_Addr" beforehand.
   It presses Next.
   
   
   
   
9. It does an establishment about the simulation. Because it omits a simulation this time It presses Next just as it is.
10. It does an establishment about the design support.
    This time, it uses Verilog HDL as the hardware-description-language to use in case of design.
    "Generate stub 'user_logic' It sets template in Verilog instead of VHDL"
    Now, the different small window in computer graphics, "Verilog Stub", rises up, but this sets above pressing. OK just as it is and presses Next.
11. The configuration is an end above, but it confirms a summary and presses Finish. The summary should be as follows.

    Thank you for using Create and Import Peripheral Wizard!
    Please find your peripheral hardware templates under
    /.../.../life/pcores/vga_v1_00_a.
    
    Peripheral Summary:
    
      top name       : vga
      version        : 1.00.a
      type           : AXI4LITE slave
      features       : slave attachment
                       user s/w registers
    
    Address Block Summary:
    
      user logic slv : C_BASEADDR + 0x00000000
                     : C_BASEADDR + 0x000000FF
    
    File Summary
    
      - HDL source -
      /.../.../life/pcores/vga_v1_00_a/hdl
      top entity     : vhdl/vga.vhd
      user logic     : verilog/user_logic.v
    
      - XPS interface -
      /.../.../life/pcores/vga_v1_00_a/data
      mpd            : vga_v2_1_0.mpd
      pao            : vga_v2_1_0.pao
    
      - Misc file -
      /.../.../life/pcores/vga_v1_00_a/devl
      help           : README.txt
      option         : ipwiz.opt
      log            : ipwiz.log